The CW contact window mask defines where the M1 mask connects to the circuit elements defined on the uncustomized chip.

The M1 metal mask is customized to produce the tracks for intra-gate and inter-gate connections. The masks which must be generated for this process are: The CMOS Gate Array has been designed for the department's own 4um single layer metal CMOS process. In many cases the customization of the gate array can be accomplished using a single metallization mask which connects together the gates as required.ĭesign costs are reduced because only one or two masks need to be generated for each new design, consequently the design is relatively simple and considerably less time consuming.įabrication costs are reduced because most of the masks are common to many designs, allowing mass production of uncustomized chips. In its simplest form the gate array consists of a regular array of uncommitted logic gates which can be connected together to form more complex digital systems. Gate arrays provide a relatively cheap means of designing integrated circuits, particularly when only small numbers of chips are required. The gate array is one approach to the problem. Various strategies are used in order to reduce the cost of designing ICs, particularly the design turnaround time and the level of skill and experience required of the designer. As a result, full custom IC design tends to be limited to high volume production chips.

The design of an integrated circuit is an expensive and time consuming task, requiring a high degree of skill from the designer. Designing for the CMOS Gate Array Designing for the CMOS Gate Array

Project red buffer gate